Recently, with the miniaturization of semiconductor devices, surface shape and other quality requirements of silicon wafers, which are the principal materials of such devices, are becoming more advanced. For example, in order to obtain as many chips as possible from a single wafer, it is desired that a wafer be made high in flatness up to an outer edge thereof. In other words, prevention of a “bulged shape” or a “drooped shape at the outer edge,” which may be called ERO (edge roll-off), is an important theme in wafer manufacturing processes and device processes.
Here, as a method for evaluating a shape of a wafer by quantifying the shape, for example, SFQR (site front least squares range) is used. Also as an ERO evaluation method, methods such as ROA (roll-off amount), etc., are used.
As another method for evaluating the shape of a wafer, Japanese Unexamined Laid-Open Patent Application No. 2004-020286 discloses a method for evaluating the shape of a wafer by applying a differentiation process and the like to shape data of the wafer measured as both or either of a front surface and a rear surface of the wafer are scanned. A wafer ERO evaluation method is also disclosed. Japanese Unexamined Laid-Open Patent Application No. 2000-031224 discloses a method for evaluating quantitatively the influence of a rear surface shape on a front surface shape caused by the vacuum suction with a frequency analysis of shape changes of the front and rear surfaces measured before and after the vacuum suction.